PCI I/O space and memory space access

[b***@gmail.com]

Hi all,

I am quite new to vxworks and I would like an advice on a matter which
is confusing me.

I am trying to write a driver for a via 82c686 audio chip, on a
standard pentium 3 bsp. I am not developing a plain vxworks driver,
but instead I am using WindML "hardware abstraction layer" etc...

There are some example drivers for Linux, based on OSS model, that are
helping a lot but despite the large pile of docs I read, I am still
confused about PCI I/O space mapping.

During my attempts of driving the audio chip, I have verified that I
can read the PCI configuration of the board ( memory base, irq etc), I
can access various offsets and read/wirte values, but I haven't been
able to access register in I/O space.

My first attempt was to use the BAR0 value as a raw pointer to memory,
then I realized ( thanks to previous posts on this group) that this
was the wrong approach and that this region must be appropriately
mapped to memory space in order to access it. But I am confused on how
I should do this :S

Can anyone point me in the right direction? Is there some WindRiver
doc that cover this topic and that I missed?

Thanks in advance!

Giacomo Benelli

[Claudio]

You can try in two ways:

- map statically the memory area in syslib.c (Look for the variable
sysPhysMemDesc)
- use the sysMmuMapAdd( ) function (look in the vxworks manuals. It
should do the job)

Claudio.

Post by b***@gmail.com
My first attempt was to use the BAR0 value as a raw pointer to memory,
then I realized ( thanks to previous posts on this group) that this
was the wrong approach and that this region must be appropriately
mapped to memory space in order to access it. But I am confused on how
I should do this :S

[gvarndell]

Post by b***@gmail.com
Hi all,
I am quite new to vxworks and I would like an advice on a matter which
is confusing me.
I am trying to write a driver for a via 82c686 audio chip, on a
standard pentium 3 bsp. I am not developing a plain vxworks driver,
but instead I am using WindML "hardware abstraction layer" etc...
There are some example drivers for Linux, based on OSS model, that are
helping a lot but despite the large pile of docs I read, I am still
confused about PCI I/O space mapping.
During my attempts of driving the audio chip, I have verified that I
can read the PCI configuration of the board ( memory base, irq etc), I
can access various offsets and read/wirte values, but I haven't been
able to access register in I/O space.
My first attempt was to use the BAR0 value as a raw pointer to memory,
then I realized ( thanks to previous posts on this group) that this
was the wrong approach and that this region must be appropriately
mapped to memory space in order to access it. But I am confused on how
I should do this :S
Can anyone point me in the right direction? Is there some WindRiver
doc that cover this topic and that I missed?

If you have access to Wind River's online support site, search for
"PCI mapping".
There are a number of documents to help you on this -- WTN 49 may be
the most useful.
What you need to understand is that BAR registers yield the PCI bus
address of the device.
The address the CPU uses to access the device is almost never that
address.
Instead, the CPU will have some window, provided by the host bridge,
through which it accesses PCI memory and IO space.
Look for macros (defined in your BSP) PCI_MEM2LOCAL or something like
that.
You still need to make sure that the local bus view of the device's
address space is mapped.

HTH,
GV

[b***@gmail.com]

Post by gvarndell

Post by b***@gmail.com
Hi all,
I am quite new to vxworks and I would like an advice on a matter which
is confusing me.
I am trying to write a driver for a via 82c686 audio chip, on a
standard pentium 3 bsp. I am not developing a plain vxworks driver,
but instead I am using WindML "hardware abstraction layer" etc...
There are some example drivers for Linux, based on OSS model, that are
helping a lot but despite the large pile of docs I read, I am still
confused about PCI I/O space mapping.
During my attempts of driving the audio chip, I have verified that I
can read the PCI configuration of the board ( memory base, irq etc), I
can access various offsets and read/wirte values, but I haven't been
able to access register in I/O space.
My first attempt was to use the BAR0 value as a raw pointer to memory,
then I realized ( thanks to previous posts on this group) that this
was the wrong approach and that this region must be appropriately
mapped to memory space in order to access it. But I am confused on how
I should do this :S
Can anyone point me in the right direction? Is there some WindRiver
doc that cover this topic and that I missed?

If you have access to Wind River's online support site, search for
"PCI mapping".
There are a number of documents to help you on this -- WTN 49 may be
the most useful.
What you need to understand is that BAR registers yield the PCI bus
address of the device.
The address the CPU uses to access the device is almost never that
address.
Instead, the CPU will have some window, provided by the host bridge,
through which it accesses PCI memory and IO space.
Look for macros (defined in your BSP) PCI_MEM2LOCAL or something like
that.
You still need to make sure that the local bus view of the device's
address space is mapped.
HTH,
GV

Hi, I solved the problem ! As the registers are in I/O space, I have
to use sysInByte, sysOutBytes... routines to access them. I just
cannot access them as standard memory pointers. The right way to do it
( or at least the one that works in my case ) is to read the BAR
value, mask the last bit, then use that value with sysInByte etc.

Now I have to figure out what's wrong in my scatter-gather dma
table ! :D

Thanks everyone for the help

Giacomo

[gvarndell]

Post by b***@gmail.com

Post by gvarndell

Post by b***@gmail.com
Hi all,
I am quite new to vxworks and I would like an advice on a matter which
is confusing me.
I am trying to write a driver for a via 82c686 audio chip, on a
standard pentium 3 bsp. I am not developing a plain vxworks driver,
but instead I am using WindML "hardware abstraction layer" etc...
There are some example drivers for Linux, based on OSS model, that are
helping a lot but despite the large pile of docs I read, I am still
confused about PCI I/O space mapping.
During my attempts of driving the audio chip, I have verified that I
can read the PCI configuration of the board ( memory base, irq etc), I
can access various offsets and read/wirte values, but I haven't been
able to access register in I/O space.
My first attempt was to use the BAR0 value as a raw pointer to memory,
then I realized ( thanks to previous posts on this group) that this
was the wrong approach and that this region must be appropriately
mapped to memory space in order to access it. But I am confused on how
I should do this :S
Can anyone point me in the right direction? Is there some WindRiver
doc that cover this topic and that I missed?

If you have access to Wind River's online support site, search for
"PCI mapping".
There are a number of documents to help you on this -- WTN 49 may be
the most useful.
What you need to understand is that BAR registers yield the PCI bus
address of the device.
The address the CPU uses to access the device is almost never that
address.
Instead, the CPU will have some window, provided by the host bridge,
through which it accesses PCI memory and IO space.
Look for macros (defined in your BSP) PCI_MEM2LOCAL or something like
that.
You still need to make sure that the local bus view of the device's
address space is mapped.
HTH,
GV

Hi, I solved the problem ! As the registers are in I/O space, I have
to use sysInByte, sysOutBytes... routines to access them. I just
cannot access them as standard memory pointers. The right way to do it
( or at least the one that works in my case ) is to read the BAR
value, mask the last bit, then use that value with sysInByte etc.
Now I have to figure out what's wrong in my scatter-gather dma
table ! :D

Oh, right -- you're on a PC.
Yes, PCI I/O space is that simple on PCs.
But you should, to be rigorous, mask off the 2 LSBs of the BAR
register value.
Good luck with the DMA.

GV

[gvarndell]

Post by b***@gmail.com

Post by gvarndell

Post by b***@gmail.com
Hi all,
I am quite new to vxworks and I would like an advice on a matter which
is confusing me.
I am trying to write a driver for a via 82c686 audio chip, on a
standard pentium 3 bsp. I am not developing a plain vxworks driver,
but instead I am using WindML "hardware abstraction layer" etc...
There are some example drivers for Linux, based on OSS model, that are
helping a lot but despite the large pile of docs I read, I am still
confused about PCI I/O space mapping.
During my attempts of driving the audio chip, I have verified that I
can read the PCI configuration of the board ( memory base, irq etc), I
can access various offsets and read/wirte values, but I haven't been
able to access register in I/O space.
My first attempt was to use the BAR0 value as a raw pointer to memory,
then I realized ( thanks to previous posts on this group) that this
was the wrong approach and that this region must be appropriately
mapped to memory space in order to access it. But I am confused on how
I should do this :S
Can anyone point me in the right direction? Is there some WindRiver
doc that cover this topic and that I missed?

If you have access to Wind River's online support site, search for
"PCI mapping".
There are a number of documents to help you on this -- WTN 49 may be
the most useful.
What you need to understand is that BAR registers yield the PCI bus
address of the device.
The address the CPU uses to access the device is almost never that
address.
Instead, the CPU will have some window, provided by the host bridge,
through which it accesses PCI memory and IO space.
Look for macros (defined in your BSP) PCI_MEM2LOCAL or something like
that.
You still need to make sure that the local bus view of the device's
address space is mapped.
HTH,
GV

Hi, I solved the problem ! As the registers are in I/O space, I have
to use sysInByte, sysOutBytes... routines to access them. I just
cannot access them as standard memory pointers. The right way to do it
( or at least the one that works in my case ) is to read the BAR
value, mask the last bit, then use that value with sysInByte etc.
Now I have to figure out what's wrong in my scatter-gather dma
table ! :D

Oh, right -- you're on a PC.
Yes, PCI I/O space is that simple on PCs.
But you should, to be rigorous, mask off the 2 LSBs of the BAR
register value.
Good luck with the DMA.

GV